Silicon transistors, vital for amplifying and switching signals, are integral to a wide array of electronic devices, spanning from smartphones to cars. Despite their widespread use, silicon semiconductor technology encounters a significant limitation known as “Boltzmann tyranny.” This phenomenon restricts transistors from functioning effectively below a certain voltage threshold, thereby impeding the energy efficiency of computers and other electronic systems. This challenge is especially relevant in the context of rapidly advancing artificial intelligence technologies that require high-speed computation.
To address this critical barrier of silicon, researchers at MIT have developed an innovative type of three-dimensional transistor, employing a distinctive set of ultrathin semiconductor materials. Their designs incorporate vertical nanowires measuring just a few nanometers in diameter, achieving performance levels comparable to leading silicon transistors, yet operating efficiently at considerably lower voltages. “This technology has the potential to replace silicon, retaining all of its functionalities but with significantly enhanced energy efficiency,” states Yanjie Shao, an MIT postdoctoral researcher and lead author of the related study.
The new transistors exploit quantum mechanical properties to simultaneously achieve low-voltage operation and high performance within a minuscule area of just a few square nanometers. Their tiny dimensions would allow for a greater quantity of these 3D transistors to be integrated onto a computer chip, yielding faster, more powerful electronics that maintain high energy efficiency. “Conventional physics has its limits. Yanjie’s work indicates that we can transcend these bounds by employing alternative physics. While many challenges remain before this approach can be commercialized, it represents a conceptual breakthrough,” asserts Jesús del Alamo, the Donner Professor of Engineering in the MIT Department of Electrical Engineering and Computer Science (EECS).
Co-authors of the study include Ju Li, the Tokyo Electric Power Company Professor in Nuclear Engineering and professor of materials science and engineering at MIT; EECS graduate student Hao Tang; MIT postdoc Baoming Wang; and professors Marco Pala and David Esseni from the University of Udine in Italy. Their findings are published today in Nature Electronics.
Overcoming Silicon Limitations
In electronic devices, silicon transistors primarily function as switches. When voltage is applied, electrons traverse an energy barrier, turning the transistor “on” from an “off” state. This switching mechanism allows transistors to represent binary digits, which are crucial for computation. The efficiency of this switching process, indicated by the slope of the transition from “off” to “on,” directly correlates with the minimum voltage required. However, Boltzmann tyranny imposes a constraint that necessitates a minimum operational voltage at room temperature.
To transcend these limitations in silicon, the MIT team employed alternative semiconductor materials, specifically gallium antimonide and indium arsenide, and cleverly designed their devices to harness quantum tunneling—a unique phenomenon in quantum mechanics that allows electrons to penetrate energy barriers. Through this approach, they fabricated tunneling transistors that effectively encourage electrons to “tunnel” through rather than surmount the energy barrier. “This innovation enables an easier on-off switching capability,” Shao explains.
Traditionally, tunneling transistors exhibit lower current, which can restrict the performance of electronic devices. Higher current levels are essential for creating robust transistor switches conducive to demanding tasks.
Precision Engineering in Fabrication
Utilizing advanced tools and facilities at MIT.nano for nanoscale research, the engineers meticulously controlled the three-dimensional architecture of their transistors, producing vertical nanowire heterostructures as small as 6 nanometers in diameter, which they claim are the smallest 3D transistors to date. This precise engineering facilitated the attainment of both a steep switching slope and high current concomitantly, enabled by the concept of quantum confinement.
Quantum confinement manifests when an electron is restricted to such a small region that it can no longer move freely. Under these conditions, the effective mass of the electron and the properties of the material shift, enhancing its tunneling potential. The researchers capitalized on this effect by designing a highly tailored thin tunneling barrier, allowing for increased current flow. “We have considerable latitude in designing these material heterostructures to achieve a very thin tunneling barrier, significantly boosting current output,” Shao adds.
The challenge of precisely fabricating devices on the nanometer scale was substantial. “We are delving into single-nanometer dimensions with this work. Only a handful of groups globally can produce well-functioning transistors in this range. Yanjie’s capability to develop such effective, minuscule transistors is remarkable,” shares del Alamo.
Testing their transistors, the researchers observed that the sharpness of the switching slope surpassed fundamental limits associated with conventional silicon transistors. Their devices performed approximately twenty times better than existing tunneling transistors of a similar design. “This achievement marks the first instance of attaining such marked switching steepness using this design methodology,” Shao emphasized.
The team is now focused on refining their fabrication techniques to ensure greater uniformity across an entire chip. With such diminutive transistors, even a variance of 1 nanometer can influence electron behavior and, consequently, device performance. They are also investigating the feasibility of vertical fin-shaped structures alongside the existing vertical nanowire models to enhance uniformity further.
“This research provides a significant advance in the performance of broken-gap tunnel field-effect transistors (TFETs). It showcases how steep slopes can be achieved alongside record drive currents. It emphasizes the importance of small dimensions, extreme confinement, and low-defect materials and interfaces in producing successful broken-gap TFETs, accomplished through a well-controlled, nanometer-scale fabrication process,” remarks Aryan Afzalian, a principal member of imec’s technical staff, who was not part of this work. This research was partly funded by Intel Corporation.
